Processors (e.g., microprocessors, CPUs, etc.) are well known and used in a wide variety of products and applications, from desktop computers to portable electronic devices, such as cellular phones, laptop computers, and PDAs (personal digital assistants). As is known, some processors are extremely powerful (e.g., processors in high-end computer workstations), while other processors have a simpler design, for lower-end, less expensive applications and products.
As is also known, there is a general dichotomy between performance and power. Generally speaking, high-performance processors having faster operation and/or more complex designs tend to consume more power than lower-performance counterparts. Higher power consumption generally leads to higher operating temperatures and shorter battery life (for devices that operate from battery power). The ever-increasing demand and use of portable electronic devices is driving a demand to produce processors that realize reduced-power operation, while at the same time maintaining satisfactory performance levels.
One method for reducing the power consumption of devices is to provide modes of reduced-power operation (sometimes referred to as “sleep states”) when the devices (or certain portions thereof) are not in use. However, there is also a desire to reduce the power consumption of devices during active operation, as well. This is often accomplished by providing more efficient designs to the operational components of the devices.
There are a number of power-consuming components in various electronic devices, and the processor is one of them. Even within a processor, there are a number of functional sections, and decoder logic is one such area. The decoder logic of a processor decodes an encoded instruction into a number electrical signals for controlling and carrying out the function of the instruction within execution logic provided in the processor. FIG. 1 is a block diagram illustrating a processor design that includes a decode stage.
The processor circuitry as shown in FIG. 1, however, has certain drawbacks. More specifically, many operations a processor performs do not access a register. When the processor executes such a function, a normal decode stage operates as if a register is needed. When no register is accessed, the logic gates within the decoder tend to switch from one state to another, thereby increasing power dissipation in the processor, shortening battery life.
Accordingly, there is a heretofore unaddressed need to overcome the aforementioned deficiencies and shortcomings.